Cache memories are not designed to perform intra-cache data transfers because this mode of operation is not needed during normal operation. However, there are situations, such as during diagnostic activity or when data errors are detected, in which an intra-cache transfer is desirable. At the present time, moving data between different portions of a cache memory may require transferring the data from a first cache memory location to an auxiliary data storage device, and then transferring the data back to a second location in the cache memory. Another alternative is the transferring of data a few bits at a time through a cache control processor between a first and second cache memory location. Both of these alternatives are undesirable. The first alternative is often not available since a given cache system may not have an auxiliary memory. The alternative of transferring a few bits at a time through a control processor is inefficient and undesirable since it may degrade the real time capability of the processor.
It can therefore be seen that no efficient method currently exists for effecting an intra-cache data transfer.